Method for determining tooth magnetic flux density ratio and optimal split ratio of motor
US-2024265164-A1 · Aug 8, 2024 · US
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for electric systems or apparatus
for electric systems or apparatus · Cooperative Patent Classification (CPC)
Computing, optics, measurement, and control technologies.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | G06G7/62 |
| Official title | for electric systems or apparatus |
| Display label | for electric systems or apparatus |
| Total patents | 20 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is growing.
| Year | Patents |
|---|---|
| 2015 | 2 |
| 2016 | 2 |
| 2017 | 2 |
| 2018 | 2 |
| 2019 | 3 |
| 2020 | 5 |
| 2021 | 1 |
| 2024 | 3 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Systems and methods for embedding problems into an analog processor
US-2024169227-A1 · May 23, 2024 · US
Systems and methods for embedding problems into an analog processor
US-11880741-B2 · Jan 23, 2024 · US
False path timing exception handler circuit
US-11194944-B2 · Dec 7, 2021 · US
Data processing apparatus, data processing method, and recording medium
US-2020410413-A1 · Dec 31, 2020 · US
False path timing exception handler circuit
US-2020372197-A1 · Nov 26, 2020 · US
Systems and methods for embedding problems into an analog processor
US-2020372393-A1 · Nov 26, 2020 · US
Systems and methods for embedding problems into an analog processor
US-10789540-B2 · Sep 29, 2020 · US
False path timing exception handler circuit
US-10776546-B2 · Sep 15, 2020 · US
False path timing exception handler circuit
US-2019266303-A1 · Aug 29, 2019 · US
Method and system for characterizing, modeling and simulating non-linear components having long term memory effects
US-10387592-B1 · Aug 20, 2019 · US
False path timing exception handler circuit
US-10331826-B2 · Jun 25, 2019 · US
Method and system for determining and implementing a viable containment design of a data center
US-10114982-B2 · Oct 30, 2018 · US
False path timing exception handler circuit
US-2018307788-A1 · Oct 25, 2018 · US
Systems and methods for embedding problems into an analog processor
US-2017300817-A1 · Oct 19, 2017 · US
Systems and methods of simulating the state of a distributed storage system
US-9659031-B2 · May 23, 2017 · US
Location assignment daemon (LAD) for a distributed storage system
US-9317524-B2 · Apr 19, 2016 · US
Pruning of blob replicas
US-9298736-B2 · Mar 29, 2016 · US
Location Assignment Daemon (LAD) For A Distributed Storage System
US-2015142743-A1 · May 21, 2015 · US
Method and system for determining and implementing a viable containment design of a data center
US-2015100297-A1 · Apr 9, 2015 · US