Methods and apparatus for adapting pipeline stage latency based on instruction type
US-9329866-B2 · May 3, 2016 · US
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Barry Edwin Franklin patents
Barry Edwin Franklin holds 3 patents in our database, with recent filings and technology areas summarized below.
| Metric | Value |
|---|---|
| Total patents | 3 |
| Recent patents | 0 |
| First publication | Jun 23, 2015 |
| Latest publication | May 3, 2016 |
Filing trend
Year-over-year patent counts for this assignee.
Recent patents
Latest publications where this party is an assignee.
Notable patents
Representative or frequently cited publications from precomputed assignee stats.
Methods and apparatus for adapting pipeline stage latency based on instruction type
US-9329866-B2 · May 3, 2016 · US
Methods and apparatus for scalable array processor interrupt detection and response
US-9158547-B2 · Oct 13, 2015 · US
Methods and apparatus for independent processor node operations in a SIMD array processor
US-9063722-B2 · Jun 23, 2015 · US
Top CPC classifications
Most common classification codes in this portfolio.
| CPC | Patents |
|---|---|
| G06F9/3885 | 2 |
| G06F9/3889 | 1 |
| G06F9/3853 | 1 |
| G06F9/3851 | 1 |
| G06F9/3802 | 1 |
Technology areas
Mapped technology topics for this assignee.
| Technology | Patents |
|---|---|
| Physics | 3 |
| Cross-Sectional Technologies | 1 |